64a65,69
> // Revision 1.33  2001/12/17 10:14:43  mohor
> // Things related to msr register changed. After THRE IRQ occurs, and one
> // character is written to the transmit fifo, the detection of the THRE bit in the
> // LSR is delayed for one character time.
> //
117,117c122,122
< // Synthesis bugs fixed. Some other minor changes
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> // Logic Synthesis bugs fixed. Some other minor changes